
#set_property SEVERITY {Warning} [get_drc_checks RTSTAT-2]
#时钟信号连接
#create_clock -period 10.000 [get_ports clk]
set_property PACKAGE_PIN AC19 [get_ports clk]
set_property CLOCK_DEDICATED_ROUTE BACKBONE [get_nets clk]
create_clock -period 10.000 -name clk -waveform {0.000 5.000} [get_ports clk]

#reset
set_property PACKAGE_PIN Y3 [get_ports reset_n]


#LED
set_property PACKAGE_PIN K23 [get_ports {led[0]}]
set_property PACKAGE_PIN J21 [get_ports {led[1]}]
set_property PACKAGE_PIN H23 [get_ports {led[2]}]
set_property PACKAGE_PIN J19 [get_ports {led[3]}]
set_property PACKAGE_PIN G9 [get_ports {led[4]}]
set_property PACKAGE_PIN J26 [get_ports {led[5]}]
set_property PACKAGE_PIN J23 [get_ports {led[6]}]
set_property PACKAGE_PIN J8 [get_ports {led[7]}]
set_property PACKAGE_PIN H8 [get_ports {led[8]}]
set_property PACKAGE_PIN G8 [get_ports {led[9]}]
set_property PACKAGE_PIN F7 [get_ports {led[10]}]
set_property PACKAGE_PIN A4 [get_ports {led[11]}]
set_property PACKAGE_PIN A5 [get_ports {led[12]}]
set_property PACKAGE_PIN A3 [get_ports {led[13]}]
set_property PACKAGE_PIN D5 [get_ports {led[14]}]
set_property PACKAGE_PIN H7 [get_ports {led[15]}]

#led_rg 0/1
set_property PACKAGE_PIN G7 [get_ports {led_rg0[0]}]
set_property PACKAGE_PIN F8 [get_ports {led_rg0[1]}]
set_property PACKAGE_PIN B5 [get_ports {led_rg1[0]}]
set_property PACKAGE_PIN D6 [get_ports {led_rg1[1]}]

#NUM
set_property PACKAGE_PIN D3 [get_ports {num_csn[7]}]
set_property PACKAGE_PIN D25 [get_ports {num_csn[6]}]
set_property PACKAGE_PIN D26 [get_ports {num_csn[5]}]
set_property PACKAGE_PIN E25 [get_ports {num_csn[4]}]
set_property PACKAGE_PIN E26 [get_ports {num_csn[3]}]
set_property PACKAGE_PIN G25 [get_ports {num_csn[2]}]
set_property PACKAGE_PIN G26 [get_ports {num_csn[1]}]
set_property PACKAGE_PIN H26 [get_ports {num_csn[0]}]

set_property PACKAGE_PIN C3 [get_ports {num_a_g[0]}]
set_property PACKAGE_PIN E6 [get_ports {num_a_g[1]}]
set_property PACKAGE_PIN B2 [get_ports {num_a_g[2]}]
set_property PACKAGE_PIN B4 [get_ports {num_a_g[3]}]
set_property PACKAGE_PIN E5 [get_ports {num_a_g[4]}]
set_property PACKAGE_PIN D4 [get_ports {num_a_g[5]}]
set_property PACKAGE_PIN A2 [get_ports {num_a_g[6]}]
#set_property PACKAGE_PIN C4 :DP

#switch
set_property PACKAGE_PIN AC21 [get_ports {switch[7]}]
set_property PACKAGE_PIN AD24 [get_ports {switch[6]}]
set_property PACKAGE_PIN AC22 [get_ports {switch[5]}]
set_property PACKAGE_PIN AC23 [get_ports {switch[4]}]
set_property PACKAGE_PIN AB6 [get_ports {switch[3]}]
set_property PACKAGE_PIN W6 [get_ports {switch[2]}]
set_property PACKAGE_PIN AA7 [get_ports {switch[1]}]
set_property PACKAGE_PIN Y6 [get_ports {switch[0]}]

#btn_key
set_property PACKAGE_PIN V8 [get_ports {btn_key_col[0]}]
set_property PACKAGE_PIN V9 [get_ports {btn_key_col[1]}]
set_property PACKAGE_PIN Y8 [get_ports {btn_key_col[2]}]
set_property PACKAGE_PIN V7 [get_ports {btn_key_col[3]}]
set_property PACKAGE_PIN U7 [get_ports {btn_key_row[3]}]
set_property PACKAGE_PIN W8 [get_ports {btn_key_row[2]}]
set_property PACKAGE_PIN Y7 [get_ports {btn_key_row[1]}]
set_property PACKAGE_PIN AA8 [get_ports {btn_key_row[0]}]

#btn_step
set_property PACKAGE_PIN Y5 [get_ports {btn_step[0]}]
set_property PACKAGE_PIN V6 [get_ports {btn_step[1]}]

set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports reset_n]
set_property IOSTANDARD LVCMOS33 [get_ports {led[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led_rg0[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {led_rg1[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {num_a_g[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {num_csn[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {switch[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {btn_key_col[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {btn_key_row[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports {btn_step[*]}]

#uart
set_property PACKAGE_PIN F23 [get_ports UART_RX]
set_property IOSTANDARD LVCMOS33 [get_ports UART_RX]
set_property PACKAGE_PIN H19 [get_ports UART_TX]
set_property IOSTANDARD LVCMOS33 [get_ports UART_TX]

#lcd
set_property PACKAGE_PIN H18 [get_ports lcd_cs_n]
set_property PACKAGE_PIN K16 [get_ports lcd_rs]
set_property PACKAGE_PIN L8 [get_ports lcd_wr_n]
set_property PACKAGE_PIN K8 [get_ports lcd_rd_n]
set_property PACKAGE_PIN J25 [get_ports lcd_rst_n]
set_property PACKAGE_PIN H9 [get_ports {lcd_db[0]}]
set_property PACKAGE_PIN K17 [get_ports {lcd_db[1]}]
set_property PACKAGE_PIN J20 [get_ports {lcd_db[2]}]
set_property PACKAGE_PIN M17 [get_ports {lcd_db[3]}]
set_property PACKAGE_PIN L17 [get_ports {lcd_db[4]}]
set_property PACKAGE_PIN L18 [get_ports {lcd_db[5]}]
set_property PACKAGE_PIN L15 [get_ports {lcd_db[6]}]
set_property PACKAGE_PIN M15 [get_ports {lcd_db[7]}]
set_property PACKAGE_PIN M16 [get_ports {lcd_db[8]}]
set_property PACKAGE_PIN L14 [get_ports {lcd_db[9]}]
set_property PACKAGE_PIN M14 [get_ports {lcd_db[10]}]
set_property PACKAGE_PIN F22 [get_ports {lcd_db[11]}]
set_property PACKAGE_PIN G22 [get_ports {lcd_db[12]}]
set_property PACKAGE_PIN G21 [get_ports {lcd_db[13]}]
set_property PACKAGE_PIN H24 [get_ports {lcd_db[14]}]
set_property PACKAGE_PIN J16 [get_ports {lcd_db[15]}]
set_property PACKAGE_PIN J15 [get_ports lcd_bl]
set_property PULLTYPE PULLUP [get_ports lcd_bl]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_cs_n]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_rs]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_wr_n]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_rd_n]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_rst_n]
set_property IOSTANDARD LVCMOS33 [get_ports {lcd_db[*]}]
set_property IOSTANDARD LVCMOS33 [get_ports lcd_bl]

#GPIO
#SPI FLASH
# sck
set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS33} [get_ports {GPIO[0]}]
# cs
set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS33} [get_ports {GPIO[1]}]
# dq0(mosi)
set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS33} [get_ports {GPIO[2]}]
# dq1(miso)
set_property -dict {PACKAGE_PIN P19 IOSTANDARD LVCMOS33} [get_ports {GPIO[3]}]
# dp2 悬空
set_property -dict {PACKAGE_PIN N16 IOSTANDARD LVCMOS33} [get_ports {GPIO[4]}]
# dq3 悬空
set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS33} [get_ports {GPIO[5]}]

#I2C
# FPGA_EXT0_IO0 scl
set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS33} [get_ports {GPIO[6]}]
# FPGA_EXT0_IO1 sda
set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS33} [get_ports {GPIO[7]}]

#others
# FPGA_EXT_IO0
set_property -dict {PACKAGE_PIN M25 IOSTANDARD LVCMOS33} [get_ports {GPIO[8]}]
# FPGA_EXT_IO1
set_property -dict {PACKAGE_PIN P25 IOSTANDARD LVCMOS33} [get_ports {GPIO[9]}]
# FPGA_EXT0_IO2 ~ FPGA_EXT0_IO24
set_property -dict {PACKAGE_PIN R26 IOSTANDARD LVCMOS33} [get_ports {GPIO[10]}]
set_property -dict {PACKAGE_PIN K26 IOSTANDARD LVCMOS33} [get_ports {GPIO[11]}]
set_property -dict {PACKAGE_PIN N26 IOSTANDARD LVCMOS33} [get_ports {GPIO[12]}]
set_property -dict {PACKAGE_PIN R25 IOSTANDARD LVCMOS33} [get_ports {GPIO[13]}]
set_property -dict {PACKAGE_PIN K25 IOSTANDARD LVCMOS33} [get_ports {GPIO[14]}]
set_property -dict {PACKAGE_PIN M26 IOSTANDARD LVCMOS33} [get_ports {GPIO[15]}]
set_property -dict {PACKAGE_PIN P26 IOSTANDARD LVCMOS33} [get_ports {GPIO[16]}]
set_property -dict {PACKAGE_PIN T25 IOSTANDARD LVCMOS33} [get_ports {GPIO[17]}]
set_property -dict {PACKAGE_PIN L24 IOSTANDARD LVCMOS33} [get_ports {GPIO[18]}]
set_property -dict {PACKAGE_PIN L25 IOSTANDARD LVCMOS33} [get_ports {GPIO[19]}]
set_property -dict {PACKAGE_PIN L23 IOSTANDARD LVCMOS33} [get_ports {GPIO[20]}]
set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS33} [get_ports {GPIO[21]}]
set_property -dict {PACKAGE_PIN M24 IOSTANDARD LVCMOS33} [get_ports {GPIO[22]}]
set_property -dict {PACKAGE_PIN L20 IOSTANDARD LVCMOS33} [get_ports {GPIO[23]}]
set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS33} [get_ports {GPIO[24]}]
set_property -dict {PACKAGE_PIN N24 IOSTANDARD LVCMOS33} [get_ports {GPIO[25]}]
set_property -dict {PACKAGE_PIN N23 IOSTANDARD LVCMOS33} [get_ports {GPIO[26]}]
set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS33} [get_ports {GPIO[27]}]
set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS33} [get_ports {GPIO[28]}]
set_property -dict {PACKAGE_PIN N21 IOSTANDARD LVCMOS33} [get_ports {GPIO[29]}]
set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS33} [get_ports {GPIO[30]}]
set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS33} [get_ports {GPIO[31]}]


create_generated_clock -name ddr_clk [get_pins pll_clk.u_clk_pll/inst/plle2_adv_inst/CLKOUT2]
create_generated_clock -name cpu_clk [get_pins pll_clk.u_clk_pll/inst/plle2_adv_inst/CLKOUT0]
create_generated_clock -name sys_clk [get_pins pll_clk.u_clk_pll/inst/plle2_adv_inst/CLKOUT1]

set_clock_groups -asynchronous -group [get_clocks cpu_clk] -group [get_clocks sys_clk] -group [get_clocks ddr_clk]
